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The Journal of
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Section 1
Richard Wood-Roe Welcome to the summer edition of our Journal. We have included papers on Managing Backdrill Stub length and Vacuum Etching for Fine Lines. We have a review of our flagship foundation course together with Industry and Membership news. There is a special section highlighting the EIPC Summer conference in Edinburgh. I am particularly grateful to Pete Starkey and i-Connect007 for permission to publish his reviews. This is certainly a premier event and is a great flagship for our industry. I wish I had been there. Dieter Weiss has provided a market report on PCB Manufacturing in Europe, showing companies by size and market sectors. I am pleased to advise that Jiva-Materials and Polar-Instruments have joined our list of web site sponsors. We express our sincere gratitude to all our corporate sponsors. |
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Section 2
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Dates |
Details |
| 4-5th Feb 2025 | EIPC Winter Conference - Luxembourg |
| 4-6th Feb 2025 | Southern Manufacturing Show - Farnborough |
| 5th March 2025 | ICT Evening Seminar, Council Meeting, PCB Fab Group Meeting and ICT AGM - Puckrup Hall, Tewkesbury |
| 15-20th Mar 2025 | IPC Apex - Anaheim |
| 7-10th Apr 2025 | Foundation Course - Chester University |
| 3-4th Jun 2025 | EIPC Summer Conference - Edinburgh |
| 18th Jun 2025 | ICT Council Meeting On-line |
| 19th Jun 2025 | PCB Fab Group Meeting On-line |
| 9-12th Sep 2025 | DSEI Trade Show - London |
| 17th Sept 2025 | ICT Council Meeting and PCB Fab Group Meeting On-line |
| 1st Oct 2025 | ICT Annual Symposium - Manor Hotel, Meriden |
| 18-21st Nov 2025 | Productronica - Munich |
| 3rd Dec 2025 | ICT Evening Seminar, Council Meeting and PCB Fab Group Meeting - TBA |
| Go back to Contents | |
Emma Hudson|
Section 3 Managing Backdrill Stub Length Variations due to Innerlayer Core Deformation
Gary A. Brist Technical Product Manager, IC Packaging: Siemens EDA Abstract Introduction
Figure 1 PCB Backdrilled Via and Backdrill Stub Length To reduce the electrical sub length while maintaining the same LSL, both the average and variation of the residual via stub must be reduced. Electrical stub length can be defined as the distance between the Backdrill Stop Point and the Must Not Cut (MNC) layer plus the contribution of the backdrill point angle and its misalignment with the PTH via. There are three fundamental factors for achieving shorter backdrill stub lengths. First is reducing the variability of the backdrill process for a specified programmed target depth. Secondly, is improving the accuracy of the measured target depth to the MNC layer location relative to a selected reference surface. And lastly, is controlling or tracking changes of the MNC layer location relative to the chosen reference surface between each backdrill location across the panel. Improvements in Backdrill Equipment and Tool Variability Table 1 Backdrill Point Contribution to Stub Length
Improvements in backdrill equipment have also improved the ability to control backdrill depth relative to the programmed depth setting specified of the drill machine. The two key contributors to the improvements are shown in Figure 2. First is improved depth repeatability when using the same backdrill tool. The second improvement is tip sensing and depth adjustments for each selected tool so that the depth offset between tools is minimized for the same specified depth setting on the machine.
Figure 2 Backdrill Depth Repeatability and Variability Determining Location of the MNC Layer and Reference Surface The challenge during backdrilling is that the surface of the PCB manufacturing panel is not planar as shown in the PCB surface topography plot using Shadow Moire in Figure 3. Recent improvements through backdrill equipment hardware capabilities and software improvements have enabled the use of the PCB entry layer surface as the reference layer during backdrilling. The entry layer surface topography is profiled before backdrilling of the vias either through drill sensing techniques on the backdrill machine or offline surface mapping. This further lowers the uncertainty of the MNC Layer position for shallow backdrill depths. Surface mapping at the dill machine is preferred as any global bow/twist and warpage removed by the drill spindle pressure foot is included. While a great improvement, the technique can miss short or rapid changes in the surface profile due to averaging across the pressure foot area. Using the entry layer surface as a reference can increase the uncertainty of the MNC location for deep backdrills in cases where the exit layer surface profile does not track with the profiled entry layer surface. It is also possible for the exit layer surface to move in the opposite direction relative to the entry layer surface. Traditionally, determining the location of the MNC Layer relative to the reference surface was done by microsection analysis at locations either within the image or within the border region of the manufacturing panel. This method contains multiple sources of uncertainty. There is variability in the MNC layer position relative to entry or exit surfaces due to internal core deformations. And small level sampling by microsection doesn't capture panel to panel variations unless a large sampling is used. This has resulted in an increased use of depth sensing techniques to determine the MNC layer location over the past several years. When done at the backdrill machine, depth sensing provides an accurate measurement at a discrete point of the MNC location relative to the chosen reference. This method requires multiple defined sample locations within the design image to estimate a profile of the MNC layer. This improves the overall predicted location of the MNC layer, but does not always capture all localized variations relative to the surface topography. As shown in Figure 3 PCB surface topography example, the selected locations for depth sensing may not capture the magnitude or topography trends of the MNC layer relative to the surface.
Figure 3 Backdrill Setup Schematic Innerlayer Core Deformation and MNC location uncertainty Figure 4 Innerlayer Core Deformation Examples The direction and magnitude of internal core deformations do not always follow changes in the surface topography of the PCB. As a result, innerlayer core deformation within a PCB generally increase the uncertainty of the MNC layer location. This then requires adjustments in the target depth to decrease the risk of cutting the MNC layer resulting in a higher backdrill stub tolerance. As published in prior works, the location of core deformation tracked with local changes in percent copper across a layer, and the core deformations were not always symmetrical across the stackup centerline [5],[6]. This was true even when the design and stackup were highly symmetrical. One hypothesis is that when multiple manufacturing panels are placed in a single press book, then asymmetry of thermal gradients during PCB lamination can induce asymmetrical resin flow resulting in asymmetrical core deformation. Since the ability to achieve smaller backdrill stubs requires minimizing innerlayer core deformation, the HDP User Group consortia initiated a work group to characterize the innerlayer core deformation and the relationship to material selection and copper balancing strategies. As part of this effort, the variation in the MNC layer location was also characterized with respect to the different reference surfaces available during the backdrill process. Experimental Methodology
Figure 5 Test Vehicle Stackup and Floorplan Blocking for Manufacturing Factors
Figure 6 Full Test Vehicle Panel and Copper Balance Strategies by Quadrant A different copper balance strategy was applied to each quadrant. A representation for a single layer and single component is shown in Figure 6. The copper balance strategy used in Quadrant 3 was set to mimic breakout approaches and copper fill percentages seen in typical designs. The strategy for Quadrant 4 was to maximize copper under the component footprint by selectively adding non-functional pads to power nets and ground nets by layer, and by adding copper patterns on signal layers where possible to keep the percent copper uniform under the component. Within Quadrant 4, care was also taken to ensure any open area under the component was filled, especially on the thicker 2 oz copper layers. Quadrant 1 and Quadrant 2 copper balance strategies were selected to stress and test the limits and mechanisms of resin shrinkage and material resin flow across different void sizes and were not indicative of typical designs. The only difference between Quadrant 1 and Quadrant 2 was the inclusion of copper thieving outside the component footprints in Quadrant 2 to maintain a uniform 25% copper across the layer. Fabrication and Material Scope
Figure 7 Build Matrix: Copper Distribution Profiles, Materials, and Fabricator Build Lots Analysis Methodology
Figure 8 Full Microsection Across Component Footprint Results and Discussion Across all samples, the change in total PCB thickness obtained from microsection measurements was compared to PCB surface interface analysis of shadow moire measurements using an Akrometrix model TTSM-J. The measurement of local changes in total PCB thickness between the two methods matched within± 3%.
Figure 9 Innerlayer Profile: Quadrant 2; Supplier H; Material M4 Core deformations observed within the measured innerlayer profiles mapped to local changes of retained copper throughout the design. The most pronounced core deformations resulted from the stacking of design patterns with low levels of retained copper across multiple layers such as the stacking of via antipad patterns under large array components. The cumulative effect of stacking amplifies both the changes in total copper and the level of core deformation at these locations. An example of deformation from stacking is shown in Figure 9 within the center area of the 28x28mm footprint region. Smaller levels of core deformation were also observed when the percent copper change was within a single layer. The magnitude and area of core deformation for different builds of the same design varied by material and the available resin from the selected prepregs. Conclusions When stacking or overlapping void areas across layers, the selection of prepreg thicknesses relative to the shape and size of the void areas influences the magnitude and direction of core-to-core thickness changes. As a result, the variations across a backdrill MNC layer is dependent on the stackup selection of prepregs as well as the copper profile across all layers of the design. As the magnitude of the core-to-core thickness changes also depend on the shape and size of the low or high copper areas, it is recommended that the size of these regions be minimized. Achieving very small backdrill stub length tolerances require all sources of variation to be reduced or eliminated. The improvements in backdrill process variation due to usage of larger point angle bits and improvement in depth repeatability cannot overcome the uncertainty of the MNC layer location. Depth sensing has allowed the location detection of the MNC layer at discrete point within a panel. The use of surface referencing has allowed the backdrill process to decrease the uncertainty in the location MNC layer location between depth sense locations. Dual layer referencing can further reduce the uncertainty for deep backdrills by compensating for local changes in the exit surface topography that cannot be removed by the backdrill pressure foot such as localized changes in the PCB total thickness. Regardless of the surface referencing technique used, the location of the MNC layer varies locally relative to any surface or mapped contour from depth sensing due to internal core deformations. The direction and profile of the internal core deformations can change independently relative to the backdrill surface reference. While depth sensing is essential to locating and mapping the MNC layer position at selected locations, it relies on discrete sampling intervals that can easily miss small area changes in the MNC layer position resulting from core deformation. As a result, designers and fabricators should be aware of the MNC layer variations due to changes in copper distribution or the stacking of voids when considering placement of backdrill locations or determining depth sense locations. As requirements for shorter backdrill stub lengths increase, an increased attention to copper balancing is required. In general, the best approach to reducing backdrill stub variation for any given backdrill process is to ensure that the design is highly copper balanced across each single layer, that the design does not contain large areas void of copper, and to minimize the use of large areas of copper fill patterns resulting in high copper density within signal layers. Acknowledgements This paper was presented at the ECWC16 at IPC APEX EXPO 2024 |
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Section 4 Vacuum Etch Technology for Fine Line Width and Space in PCB's Reginald Lai et all, Intel Corporation
Reginald Lai Abstract |
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Introduction Table 1. Design Rules for Pin Pitch Scaling The process flow for manufacturing LW/LS dimensions in the PCB industry is through subtractive copper etch technology (Traditional Etch). This series of PCB manufacturing steps is typically known as Develop/Etch/Strip (DES), where after the DFR undergoes ultraviolet (UV) exposure, the unexposed DFR is removed to develop the design image, the exposed copper is etched, and then the remaining DFR is stripped [3] (Figure 1).
Because of how the chemical etching solution (etchant) etches the copper, there is a difference between the top and foot of the line width - this ratio is commonly known as the etch factor. PCB suppliers typically define the LW/LS dimension based on the foot of the trace (Figure 2).
Per the IPC-6012 requirements section for "Conductor Width and Thickness", the line width tolerance requirement is ±20% [4], which is achievable with Traditional Etch for 100 µm LW/LS on 1oz Cu with high process capability. By maintaining 1oz Cu and reducing the LW/LS dimension, Traditional Etch struggles to maintain the ±20% tolerance requirement, increasing the risk of under and over etching [5] (Figure 3). The increased variability of the LW/LS from under/over etching significantly impacts signal integrity for high-speed channels, such as impedance, insertion loss, and return loss.
Vacuum etch technology is a modification of Traditional Etch. Vacuum suction tubes are added into a horizontal etching equipment line to absorb excess etchant, preventing puddles of etchant from forming on the top side of the core laminate (Figure 3). This "puddle effect" removal improves the etch factor and LW/LS uniformity. The suction tubes are only necessary on the top side of the core laminate as the puddle effect does not occur on the bottom side.
Vacuum etch is an existing technology in the PCB industry and is used to enable LW/LS reduction at thinner Cu thicknesses like 0.5 oz Cu. To enable LW/LS reduction on 1 oz Cu thickness, additional process optimizations need to be considered, such as reducing the DFR thickness and changing the UV light exposure method to LDI. The combination of vacuum etch technology, LDI, and thinner DFR will be referred to as Vacuum Etch 1.0 in this publication. Vacuum Etch 2.0 expands Vacuum Etch 1.0 LW/LS reduction capability on 1 oz Cu with "two-fluid" nozzles that combine chemical gases with the etchant (Figure 4). The two-fluid nozzles reduce the etchant droplet dimension and spread from 100 250µm to l l00µm, further improving the LW/LS etch factor and uniformity. The chemical gases are a combination of gas with chemical agents that promote etching anisotropy, also known as "banking agents" [6].
Maintaining thicker Cu for finer LW/LS has become a challenge to manufacture with the Traditional Etch process, but process technology tools are available in the PCB industry to address this challenge. This paper will discuss: i) Vacuum Etch 1.0 and 2.0 process capability from PCB suppliers, and ii) Key enablers to manufacture finer LW/LS requirements. Vacuum Etch 1.0 and 2.0 Experimental Set-up
Table 2. Test Coupons on Vacuum Etch 1.0 and 2.0 DOE Test Boards The reference socket coupon simulated segments of a Ball Grid Array (BOA) socket layout with dual track routing to evaluate the etch performance of routed lines between pads. The serpentine coupon had a comb-like route pattern with the LW/LS zigzagging to simulate dense routing areas outside of a socket. Both coupons were designed to have measurable LW/LS dimensions to calculate the process capability index (Cpk) [7].
Vacuum Etch 1.0 and 2.0 DOE Plan, Test Conditions, and Success Criteria Table 3. Vacuum Etch 1.0 and 2.0 DOE Test Matrix The test conditions and success criteria for the Vacuum Etch 1.0 and 2.0 DOE are summarized in Table 4. LW/LS were manually measured by PCB suppliers using a 25 µm resolution optical inspection tool, while electrical testing (E-test) was used to detect and isolate potential defect modes. Each test coupon had two predefined measurement locations, one for LW and LS, to control measurement variation across all the PCB suppliers. Each supplier provided 384 measurements to calculate the Cpk (total 3840 measurements across Vacuum Etch 1.0 and 2.0). Table 4. Vacuum Etch 1.0 and 2.0 Defect Mode, Test Methods, and Success Criteria Vacuum Etch 1.0 and 2.0 Process Capability Results
Supplier C's data shows Cpk 2: 1.00 for the LW on the top side core laminate as they manufactured the test boards with Traditional Etch, LDI and> 25µm DFR. However, their data suggests that Cpk 2: 1.33 can be met for the bottom side with LDI and without the need of vacuum etch or thinner DFR. The data also suggests that using DFR >25µm is possible with advanced etching compensation method and etch rates, which can be observed from Supplier F's Cpk results. Table 5 summarizes the key enablers needed for Vacuum Etch 1.0 - utilizing vacuum etch technology, switching from UV exposure to LDI, and reducing the DFR thickness to 25 µm and below. Table 6 adds two-fluid nozzles as a key enabler for Vacuum Etch 2.0. Table 5. Summary of Vacuum Etch 1.0 Process Optimizations to meet 75µm LW/LS
Table 6. Summary of Vacuum Etch 2.0 Process Optimizations to meet 50 µm LW/LS PCB suppliers also adjust etching compensation values and etching rate (the ratio between etching line speed vs. etchant output), but this varies between the PCB supplier and the vacuum tool vendor. These adjustments were not tracked for Vacuum Etch 1.0 and 2.0 DOEs as every PCB supplier has unique etching compensation rules and each tool vendor has unique etch rate guidelines. Vacuum Etch 1.0 and 2.0 Defect Modes and Defect Rates
The most common defect modes that were observed across the three different etch types were routing line opens/shorts, gaps/pinholes (voids within a line width but not a full open defect), and under/over etch. The Pareto charts suggest that Vacuum Etch 1.0 and 2.0 decrease the defect rates for open/shorts and marginally decrease under/over etch but see a slight increase in DFR damage defects. This is most likely due to the thinner DFR being more susceptible to tearing or breaking during handling and processing. The under/over etch defect rate remains low (:::;4%) across the different etch technologies, suggesting that finer LW/LS can still maintain tight uniformity when paired with the correct etch technology. Table 7. E-Test Data for Vacuum Etch 1.0 and 2.0 Serpentine Coupon and Reference Socket Figure 11 compares cross-section results between Traditional Etch, Vacuum Etch 1.0, and Vacuum Etch 2.0 and validates the optical measurements provided by the PCB suppliers. The cross-section images also show that the aspect-ratio between LW1 and LW2 are comparable across the three etching technologies (LW i/LW2 ~0.8). Using the cross-section measurements to calculate the etch factor, F=(2T)/(LW2- LW1), we do see improvement from Traditional Etch (F=3.16) to Vacuum Etch 1.0 (F=4.48) and Vacuum Etch 2.0 (F=5.60).
Conclusion With Vacuum Etch 1.0, vacuum etch technology paired with thinner DFR and LDI can achieve 75 µm ±20% LW/LS on 1 oz Cu with Cpk 2: 1.33. The data also shows that if the routing is on the bottom side of the core, 75 µm LW/LS can be achieved with either Vacuum Etch 1.0 or Traditional Etch if thinner DFR and LDI processes are utilized. If 75 µm LW/LS routing is required on both sides of the core laminate, Vacuum Etch 1.0 is recommended. Vacuum Etch 2.0 combines two-fluid nozzles with vacuum etch technology, LDI, and thinner DFR to achieve Cpk 2: 1.33 with 50 µm ±20% LW/LS on 1oz Cu. The addition of the two-fluid nozzles optimizes the pressure, speed, and droplet size of the etchant, improving the LW/LS uniformity and etch factor on both sides of a core laminate. Although manufacturing yields vary between PCB suppliers, the E-test and cross-section results demonstrate PCB suppliers' capability to manufacture PCBs with 75 µm and 50 µm LW/LS on 1 oz Cu. The comparable defect modes and rates captured suggest that there is minimal risk for adopting Vacuum Etch 1.0 and 2.0 to enable finer LW/LS on 1 oz copper thickness. The slight defect rate increase in DFR damage is worth highlighting because of the thinner DFR, which will require PCB suppliers to optimize their handling and processing procedures. With all the data collected and analyzed, the key enablers for finer LW/LS on 1 oz Cu are summarized in Table 11. Table 11. Key Enablers for lOOµm, 75µm, and 5Oµm LW/LS on 1oz Cu It is important for customers to work with their PCB suppliers to establish design requirements and manufacturing processes for finer LW/LS as well as run scout lots to mitigate other potential PCB manufacturing risks. Further work is also needed to better understand the impact of lower Cu roughness foils and thicker Cu foils to achieve finer LW/LS requirements. Acknowledgments References |
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Figure I. Develop/Etch/Strip (DES) Process Flow
Figure 2. Line Width and Space Parameter Definition
Figure 3. Under/Over Etch vs. Optimal Etch
Figure 4. Traditional Etch vs. Vacuum Etch Technology
Figure 5. Vacuum Etch 1.0 vs. Vacuum Etch 2.0
Figure 6. Reference Socket and Serpentine Coupon Designs
Figure 7. Vacuum Etch 1.0 and 2.0 DOE Stackup
Figure 8. Vacuum Etch 1.0 Supplier Cpk Data vs. Line Width/ Line Space (Top vs. Bottom)
Figure 9. Vacuum Etch 2.0 Supplier Cpk Data vs. Line Width/ Line Space (Top vs. Bottom)
Figure 10. Defect Pareto for Traditional Etch vs. Vacuum Etch 1.0 vs. Vacuum Etch 2.0
Figure 11. Cross-Section Comparison Between Traditional Etch, Vacuum Etch 1.0, and Vacuum Etch 2.0| Section 5 |
ICT Foundation Course |
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This was the first year in many without Bill Wilkie at the helm of the Foundation Course and he was missed, not only by me but also by our regular lecturers and the team at Chester University. Hopefully we did Bill proud though and looking at the delegate reviews, I think we did. We welcomed 20 delegates onto the course, coming from across the full breadth of the supply chain of our PCB industry, including three from an OEM. Day 1 was kindly hosted by Merlin Circuits at their Deeside facility, where we had four lectures and a guided factory tour. The factory tour is such an important part of the course, it truly demonstrates the complexities and many stages involved in manufacturing a PCB, something that many of our delegates had not had chance to witness first-hand before. Over the course of the week our lectures then took the delegates through each of those stages in greater detail, giving them a much better comprehension of the PCB and why it’s not the commodity item so many outside of our industry believe it to be. On the first evening we had our usual welcome dinner for our delegates along with some of our lecturers, this year it was kindly sponsored by Polar Instruments, and a great time was had by all at the Brewhouse & Kitchen in Chester. One of the benefits associated with the Foundation Course is getting to know other people within the industry and the dinner allowed for a very relaxed environment to do this in. Days 2, 3, and 4 of the course were held at Chester University, with 13 lectures across the 3 days, from 10 different lecturers, all of whom are volunteers, giving their time and sharing their expertise with our delegates. The university team were superb hosts, keeping us well fed and watered, and providing some very popular outside seating for our breaks, as we had glorious sunshine throughout the course. All of our delegates have been welcomed to the Institute as Associate Members and we hope that we’ll be welcoming them to ICT events in the future. I’d like to take this opportunity to thank all our delegates, the companies sponsoring them to attend the Foundation Course, our lecturers (Mat Beadel, Steve Kerr, Martin Goosey, Leigh Allinson, Mark Gordon, Neil Chamberlain, Gavin Barclay, Glenn Swanton, Dave Hotston, Andy Cobley, Antony Earl, Andre Bodegom, and Martin Wickham), Polar Instruments for sponsoring the dinner, and the Merlin Circuit Technology team for hosting us and showing us around their factory. We plan to be back in Chester for the 2026 Foundation Course, and we hope that some of you reading this will be joining us next year. Emma Hudson Our Lecturers A big thank you to our lecturers. Most have presented at our Foundation Course for many years and we are extremely grateful for their contribution. 
Mat Beadel: Merlin PCB Group
Steve Kerr: Amphenol-Invotec
Martin Goosey
Leigh Alinson
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An extra positive experience during Dave Hotston’s lecture
| Section 6 |
Takeaways from the Keynotes at the Edinburgh EIPC Summer Conference |
| (Editor’s note: This is the first of three articles on the EIPC Summer Conference. The other two articles will cover the sessions for Day 1 and Day 2. Below is a recap of the opening day keynote.)
It was seasonably wet and windy in Edinburgh, Scotland, June 3-4, where delegates from 17 countries convened for the 2025 EIPC Summer Conference to enjoy a superlative program of 18 technical presentations over two days, plus an excursion to a whisky distillery. EIPC President Alun Morgan welcomed everyone to the Delta Hotel, reminding us that in its previous iteration, it was the Royal Scot, traditionally the annual venue of the Institute of Circuit Technology Northern Symposium. To my delight, he produced a copy of the 1982 proceedings, where I gave a presentation on outgassing. Morgan never fails to impress with his topical and relevant introductions. This year, he focused on a nearby statue commemorating Edinburgh-born physicist James Clerk Maxwell, considered by many to be the father of modern physics. Recognized for his classical theory of electromagnetic radiation, which describes electricity, magnetism, and light as different manifestations of the same phenomenon, Albert Einstein acknowledged him: “The work of James Clerk Maxwell changed the world forever.” Ranked alongside Sir Isaac Newton for the fundamental nature of his contributions, Maxwell produced the first complete set of equations governing electricity and magnetism, expressed in terms of fields, describing how electric and magnetic fields propagate and interact.
Noted for his practical demonstrations, Morgan took from his gadget-box a powerful neodymium magnet and a copper tube. Dropping the magnet through the tube, he explained that as it fell through the conductor, the magnet causes an electric current, which generates a magnetic field that opposes the magnet. The magnet passes through the tube without touching the sides— a passive display of how electricity and magnetism work together and how waves propagate— the basis of all of our communications today. Although we are well aware that communications rely on electromagnetic waves, a rapid proliferation of communications devices surrounds us. Morgan raised the issue of how to get power to billions of devices without relying on batteries. Around 40,000 tons of portable batteries were sold in 2020 in the U.K., with only around 18,000 tons being recycled and the remainder disposed of with the rubbish. This led him to the topic of long-range wireless power and the achievements of RX Watt, a spin-out of the University of Glasgow, in developing a holistic solution for simultaneous wireless power and data transfer, eliminating the need for traditional batteries and enabling battery-free sensing and seamless recharging, covering industrial, healthcare, and consumer electronics. Morgan gave practical examples, including unlocking a battery-less smart padlock with power from his phone. He noted that the Japanese OHISAMA Project proposed to wirelessly transmit solar energy from space to Earth, using rectifying antennas to receive electromagnetic energy from satellites and convert it into direct-current electricity.
Figures attributed to NT Information Ltd estimate that total world PCB output for 2024 is $95,705 million, of which the West represented $5,440 million and Asia $90,265 million. China produced $57,200 million, 60% of the world total, while Europe’s share was $1,850 million, barely 2%. Morgan commented that China alone was 10x the West, and Asia totalled 94%. “We hear a lot about everything coming back to the U.S. and back to Europe,” he said. “Believe me, it’s not going to happen. We can do some things, and there are certain areas where we can do something very important, but we cannot bring the volume back.” He added, “Although there is a migration going on from China to other parts of Asia, the U.S. and Europe have to realize that the supply chain for all that we do starts in Asia now, and we have to be very smart to find things that we can do that add value that can’t be added in those other markets.” He mentioned specialized areas like medical electronics and defense, together with ongoing innovations in sustainable electronics. He made some interesting observations on comparative costs of electricity; it being three times as expensive in Europe as the U.S. and four times as expensive as China, putting Europe at a significant disadvantage. He also remarked that, particularly in defense electronics, the U.S. is effectively a significant competitor to Europe. Competition is not just from China. Referring to Custer’s graph of European PCB industry revenues and number of manufacturers for the 2000–2024 period, Morgan was optimistic that, although revenue has declined to around $1.8 billion, it has now flattened-off and could rise to the $2 billion level, especially with the prospect of Teltonika’s new PCB factory coming on-stream in Lithuania. Although the number of manufacturers continues to decrease, this was partly explained by mergers and consolidation. He believes that the European industry remains viable, and although it only represents 2% of world revenue, that 2% has high value. The map of the world balance of trade for PCBs shows China as the only country with a trade surplus, but Morgan looked more closely at the European situation where, in 2023, exports of PCBs (bare and loaded) totalled $4.38 billion against imports of $9.66 billion, a balance of trade deficit of $5.28 billion. He reminded us that even if PCB manufacturing returns to Europe, Asia still produces most of the raw materials. There is only one supplier of copper foil in Europe, and no suppliers of glass fabric or resin. The availability of critical metals is another cause for concern, with the majority being sourced primarily in China. On the subject of the world economy, Custer commented on trade turmoil rippling across tech, retail, and manufacturing sectors because of U.S. President Donald Trump’s tariff regime, and global industries are responding with caution, expansion shifts, and dire forecasts. Top PCB makers are increasingly investing in Southeast Asia to avoid tariff fallout, with Thailand a rising hub for PCB production. Thailand alone will likely produce $10 billion worth of PCBs by the end of the decade, five times the European output. Although Europe is showing modest industrial recovery, the overall trade landscape remains volatile, and geopolitical tensions are reshaping global commerce. European SMEs are cautious about making investments in America, and tariff uncertainty and rising costs are pushing firms to reconsider or delay projects, with many redirecting their focus to markets like India and Latin America. World economic projections for the 025–2030 forecast that China will grow by 23%, with India at 15% and the U.S. at 11%, while it’s predicted Germany, France, and the U.K. will grow by less than 2%. Looking at the European PCB industry, Custer said it is navigating a complex landscape in 2025, marked by modest growth, strategic shifts, and ongoing challenges. Growth will be driven by demand in sectors such as automotive, telecommunications, and consumer electronics, particularly with the rise of electric vehicles, autonomous driving, and 5G technologies. With the semiconductor industry booming, there is an enormous potential growth area in packaging substrates.
He remarked that, as of 2023, more than $2.9 billion worth of bare-board PCBs are produced in Thailand, accounting for approximately 4% of global PCB production, and that, within Southeast Asia, Thailand has attracted over 50 PCB manufacturers and more than $5 billion in capital to expand multilayer and HDI PCB manufacturing capabilities. Additionally, more than $1 billion in new capital is expected to be invested to enhance Thailand’s production capacity for PCB materials, tools, and accessories, which represent approximately 60% of the new PCB investment capital in Southeast Asia. Key strengths of the Thai industry are a stable supply of electricity at competitive costs, experienced and talented human resources, a stronger infrastructure than other Southeast Asian countries, competitive labour costs, and a stable democratic environment. Thailand is preferred by Western end-customers and favoured by Taiwanese and Chinese PCB producers. It benefits from supportive government programs and competitively low labor costs (although it has higher manufacturing costs than China), supply chain gaps, and a shortage of highly specialized human resources. Recent investments in PCB manufacturing in Thailand have been driven primarily by geopolitical tensions. These could potentially double or triple PCB production output in Thailand within the next five years and help Thailand become one of the top-three PCB manufacturing locations in the next three years. A clustering effect is emerging in Thailand, with leading PCB manufacturers increasingly committed, and many leading Western electronics OEMs favouring the establishment of new PCB production sites to diversify risk. Primett believes there is a demand for a new “out-of-China” PCB manufacturing hub, and that Thailand might be the optimal choice. Realistically, he also believes that recent investment alone does not guarantee long-term sustainability or future growth. Without adequate returns on investment or sustained competitiveness, leading PCB companies might slow future investments or seek alternative sites and opportunities elsewhere. Some critical success factors in the development of the PCB industry will be government support in taxation, water, electricity and land supply, enlarging and developing talent pools by collaboration with local vocational schools, universities, and research centers, working with global leading manufacturing tool and material suppliers, and enhanced exchange programs with development organizations in other countries. Because the PCB industry is capital intensive, it will need access to local financial institutions, equity markets, and local entrepreneur participation. To support expansion and growth, it will need access to upstream and downstream industries such as PCBA, module, and box assembly, as well as electronics materials and manufacturing equipment. THPCA was established in 2019 and admitted as a member of WECC in 2020. Primett reviewed some of its milestones and described the association’s team and its vision and mission. Its activities and achievements include business development, government liaison, cluster and SME development, market and industrial surveys, and the establishment of the Thailand Electronics Circuit Center, whose work includes education and training, local supply chain development, and a PCB prototype factory.
They explained the cost-effective principle of a decentralized business model and its advantages. Without a classic headquarters, the focus is on the customer, who always meets the decision-maker. Business decisions are made in every factory on the spot, and responsibility is taken by the employee. Incap’s strategy focuses on three strategic cornerstones: growth, profitability, and operational excellence. Their growth is based on the increasing use of electronics, the outsourcing trend, and its focus on Europe, North America, and Asia–Asia-Pacific, together with a broadening of their service offering, plus targeted mergers and acquisitions. Its profitability is based on maintaining a unique and efficient business model with strong cost awareness and an entrepreneurial culture, enabling value creation and a broader service offering, together with the synergies and economies of scale from its mergers-and-acquisitions activities.
Maughan described Incap’s corporate sustainability program, “ESG at Incap,” which began in 2020 and is based on environmental and social responsibility and governance. They take a holistic approach, which includes innovation, sustainable, profitable technology, and business development, with a “victim vs. winner” mentality. “It’s not simply about making money from the business you do, but how you make it. We want to do it sustainably.” Pukk commented. “But it’s tough!” Outlining Incap’s value creation model, they discussed at length the importance of understanding market needs and demands, and see technological evolution as a key input. Rapala-Virtanen closed the session moderating a lively Q&A. I gratefully acknowledge Alun Morgan’s generosity in sharing his excellent photographs. Editor's note: This article was previously published in PCB007 and we are grateful for their permission to include this in our Journal. |
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EIPC Technical Director Tarja Rapala-Virtanen moderated the keynote session and introduced the keenly awaited Custer Consulting Electronics Business Outlook, delivered on behalf of Jon Custer by Morgan.
Rapala-Virtanen introduced then introduced Daniel Primett, vice-president of Auromex Group and a member of the Technical Committee of the Thailand Printed Circuit Association. He described the growth of the PCB manufacturing industry, Thailand’s competitive position in the PCB market, and THPCA’s objectives.
The association is organizing its Thailand Electronics Circuit Asia exhibition in Bangkok in August and will host the ECWC conference in 2027To complete the keynote session, Rapala-Virtanen introduced Otto Pukk, president and CEO of Incap in Estonia, and his colleague Jamie Maughan, MD of Incap in the U.K. They gave a joint presentation titled, “Aligning Technological Evolution With Market Needs and Sustainability Objectives,” describing the characteristics of their EMS company, which specializes in manufacturing electronics, electromechanical products, and final assemblies from prototypes to global mass production in their factories in Estonia, India, Slovakia, the U.K. and the U.S.
Their operational excellence is a result of their investments in high-quality technology and the know-how of its personnel. Their decentralized organization motivates personnel and brings value to its customers. An additional factor is the successful integration of acquired businesses.|
Section 7 Day 1: Cutting Edge Insights at the EIPC Summer Conference |
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| The European Institute for the PCB Community (EIPC) Summer Conference took place this year in Edinburgh, Scotland, June 3-4. This is the second of three articles on the conference. The other two cover the keynote speeches and Day 2 of the technical conference. Below is a recap of the first day’s sessions. Sustainability and Recycling
Klok reviewed the projects’ objectives: to provide new design and manufacturing practices, improve the electronics circularity level, and reduce the dependency of European electronics-related sectors on extra-EU supplies. The project aims to increase resource efficiency and independence, reduce the negative environmental footprint of electronics manufacturing processes, adopt the circular-economy paradigm in the automotive sector, improve the sharing, exchange, and standardization of information and data between industry leaders in similar value chains, and demonstrate the practical benefits of reusing and re-manufacturing semiconductors and electronic components through four pilot projects. The first pilot supports the development of an environmentally friendly electronic control unit; the second supports the development of new-generation tire sensors; the third supports the development of embedded circuits; and the fourth improves the classification and storage of obsolete printed circuit boards from various electrical and electronic circuits.
Klok focused on the added value of materials, with particular reference to replacing SAC305 solder with low-temperature solder and replacing electroless copper with carbon-based direct metallization. Test vehicles are being built for assessing silver, dielectric, and carbon inks as materials for in-mold electronics. Recyclable Liquid Metal
He described how to implement sustainable PCBs and discuss antenna and circuit fabrication techniques. In his example of the fabrication of a functional circuit assembly, the substrate is formed by 3D printing of polylactic acid, and the tracks are filled and interconnects made using Galinstan, a eutectic alloy of gallium, indium, and tin, which is liquid at room temperature. At end-of-life, the recycling process involves soaking the assembly in 10% sodium hydroxide at room temperature, which degrades the polylactic acid, enabling the recovery of the components and the liquid metal. Fang showed examples of various fabricated PCB assemblies, including power amplifiers, voltage control oscillators, and broadband monopole antennas, and demonstrated the capability to recover their materials with less than 2% total waste at a cost of less than £1.10 ($1.49) per circuit. The repeatability of recycled antennas has been quantified, with less than 0.15 dB/cm attenuation of transmission lines after more than nine cycles. Next-gen Electronic Assemblies
Because the brittle nickel layer is eliminated, solder joints are made directly to copper, via a tin-copper rather than a tin-nickel intermetallic, and are stronger, with a higher force-to-failure on a solder-ball shear test. An additional benefit is the freedom from possible nickel-bridging on ultra-fine-line work. Shah highlighted concerns around E-waste, which amounts to 70 million tons globally per year. Of this, only 20% is recycled; the remainder is either burned or sent to landfill. Landfill disposal is already prohibited in some U.S. states. Gold mining is a potentially highly toxic process, and one ton (2,000 pounds) of ore typically yields one gram of gold, whereas one ton of E-waste could yield 300 grams (10.6 ounces) of gold— an incentive to develop efficient recovery techniques. Wwhat about spent gold deposition processes and gold-bearing rinse waters? LiloTree has developed efficient electrolytic recovery systems, which further contribute to the principles of sustainability and circularity. From Microvias to Medical Implants
Traditionally, electrodes are prepared by labor-intensive manual methods, attaching cables to electrodes, pulling the cables through a tube, and attaching them to a connector. The question is how to transition from wires to substrates, to minimize invasiveness, make devices smaller, improve the precision and resolution of measurement, reduce the production cost with fewer manual steps, and improve the quality. In 2016, Dyconex and Duke University made the first fully biocompatible electrode— a liquid crystal polymer (LCP) grid array with 256 electrodes of 75 micron diameter at 750 micron pitch and a pure gold surface. This proved to be a reliable implant for up to 12 months, and Duke University published the results in 2018.
A downside is its limited adhesion properties to sputtered metals, requiring special treatment and design considerations. Otherwise, LCP can be processed in the same production line with the same equipment as polyimide film. Conductors in contact with the human body need to be made in noble metal, typically electroplated gold on a palladium seed layer. Inner layer conductors can be copper. A gold surface is acceptable for short-term exposure, but a platinum coating is preferred for extended exposure. Silver/silver chloride can be used for reference electrodes. Da Costa demonstrated the level of routing complexity that could be achieved: sequential construction with blind vias, up to six independent conductor layers, 50-micron vias, and feature sizes less than 50 microns. He showed examples of cylindrical forming, flex-to-flex bonding, and LCP encapsulation. His final illustration showed a complete, fully flexible, biocompatible LCP electrode. Enhanced Copper Plating Performance Copper plating has come a long way since the buckets, rubber aprons, and Wellington boots of my youth.
What is the justification for a new plating tool? Standard vertical plating suffers from high variability in copper thickness due to the large window. It has limited ability to handle ultra-thin panels; it is labor-intensive, and maintenance-heavy. Vertical continuous plating equipment has constraints in panel size and product mix and occupies a large footprint. Ramos’ proposed solution is modular in concept, with precise plating control at the single-panel level. It has fully automated, touch-free handling and offers advanced horizontal fluid delivery in a vertical mode. It takes a holistic approach to vertical wet processing by integrating rinsing as a critical process step, combining positive and negative-pressure rinsing for superior solution exchange in complex features. Roto-molded tanks with integrated sumps prevent leaks and contamination, improve fluid dynamics and sump control, and bring efficient horizontal fluid delivery into a vertical system design. Altogether, it offers a flexible and controlled plating process. Ramos described the details and main characteristics of the plating cell design, which features high current density capability, together with vertical and lateral variable-frequency-drive-controlled panel agitation for improved distribution, mixed-metal-oxide coated titanium anodes, and remote copper oxide replenishment. He described details of the fluid delivery system and the panel-holding and agitation system. Similarly, the cleaner and pre-dip processing cells and the rinsing technology are all designed with customers’ wastewater systems in mind. Ramos’ microsection photographs of high-aspect-ratio blind microvias illustrated the superior performance of the integrated process. Crystallization and Epitaxial Growth in Blind Microvias
He discussed a list of contributing factors, beginning with electroplated copper and examining its microstructure, epitaxy, nanovoid and inclusion density, and leveler/brightener co-deposition. Similarly, for the electroless copper layer, he looked at microstructure, epitaxy, nanovoid and inclusion density, and surface facets. For the blind microvia wedge, he discussed aspect ratio, cleanliness, and electrical contact to the target pad, as well as the target pad microstructure, before and after laser drilling, its flatness and roughness, and the microvia shape, hole-wall, and general drilling quality. He compared the characteristics of single-crystal and broken-crystal structures in electroplated copper via fill, asking, “How do microstructures form?” Immediately after plating, neither electroless nor electroplated copper has any significant microstructure; the microstructure develops over time due to crystallization. Freezing samples in liquid Nitrogen directly after electrolytic plating makes it possible to study the crystallization process. After plating, the larger copper grains of the substrate grew and recrystallised the electroless and electrolytic layers by grain boundary diffusion and grain growth. Effectively, this was a “bottom-up” recrystallization. Massey said that interfaces need to be free of contaminants such as oxides, desmear residues, photo resist, and plating additives. The characteristics of bottom-up recrystallization are that there are no visible interfaces or layers and no grain boundary alignment at the copper-copper-copper junction, resulting in high joint integrity. In comparison, top-down recrystallisation after electroplating and annealing for one hour at 140°C shows clear, visible interfaces and layers, grain boundary alignment at the copper-copper-copper junction, and low joint integrity. Massey also discussed the impact that some additive packages in electroless copper baths can have on the copper layer and how it crystallizes. Regarding the crystallization of electrolytic copper, Massey noted that “annealing” included recrystallization and has a significant impact on its final properties. Annealing occurs at room temperature and is accelerated by heating. Bottom-up recrystallization, or epitaxy, which occurs when there are clean interfaces between electroless and electrolytic copper deposits, is typically limited to the first few microns of plating, and plating additives become dominant in the bulk plated layer to create desired properties. “So, in light of all this information, is the microstructure actually important?” Massey asked. A comparison exercise confirmed that, after six reflow cycles at 245°C, single-crystal structures consistently survive, whereas broken crystal structures consistently fail at the interface. “Can the microstructure predict reliability?” Massey asked. He concluded that microstructure is an important indicator for relative joint reliability, and it can be inspected and quantified. However, blind microvia reliability is a complex subject involving many process interactions, not just the plating. A Circular Economy Industry
His first speaker was Dr. Erdem Selver, representing Jiva Materials and the University of Portsmouth, with a presentation on the development of sustainable composites for PCB applications. He defined the problems of the moment: electronics is a growing climate threat, responsible for up to 4% of global carbon emissions; the PCB is the unsustainable backbone of the electronics industry; PCB manufacturing emits up to 20 kg (44 lbs) of CO2 per square metre; and E-waste is a crisis built on PCBs. There were about 67 million tons (134,000 lbs) of E-waste in 2024, of which less than 23% was recycled. Selver described the creation of a novel recyclable and biodegradable PCB substrate, incorporating biodegradable polymer and natural fibres for electronic devices in applications including computing, lighting, domestic appliances, aerospace, and automotive. The experimental methodology is based on biodegradable composite materials, including hydrophobically modified polyvinyl alcohol (PVA) with a halogen-free flame retardant (organic phosphonate). Jute, flax, or hemp fabrics are impregnated with PVA/flame retardant mixture using a belt press, the entire procedure taking around five minutes, including the heating and cooling of the composites. These prepregs are layered up and hot-pressed for various cycles depending on the final PCB manufacturing requirement.
Selver highlighted real examples of the material’s commercial applications with PCBs in a wall-charger power supply, a laptop track-pad, and an LED lighting assembly. Future objectives are to manufacture multilayer PCBs, further reduce total CO2 emissions, obtain a V0 flame rating, and reduce the cost of processing and raw materials. Benjamin King, a University of Glasgow research associate in green large area electronics, said that sensors in electronics have become ubiquitous and the ongoing demand is for billions of devices, resulting at end-of-life in significant electronic waste, which would probably end up in landfill. For truly sustainable electronics manufacturing, he believes the focus should be on the three key pillars: materials, fabrication energy, and end-of-life considerations. Additionally, E-textiles offer opportunities for lightweight flexible sensors as well as power electronics and electronic components. Considering deposition methods, electroless nickel immersion gold is well established and will work on rough textiles, but consumes a scarce precious metal. Direct-write printing is high-precision, but slow, and limited to small areas. Screen printing can cover large areas and is compatible with rough surfaces, even though it is limited in resolution.
Besides the work of his own department in the University of Glasgow, there are two other nationally-leading EPSRC-funded strategic facilities, one working on the rapid prototyping and characterisation of a wide range of semiconductor devices, the other on RF and terahertz devices and systems. Enhanced Direct Metallization
Direct metallization provides measurable reductions in water, power, and chemical consumption in the supply chain that could contribute directly to sustainability goals. Safer chemistries and processes reduce the likelihood of restrictions or bans. Furthermore, direct metallization is a low-risk, readily available technology with high performance and reliability. The latest version of MacDermid Alpha’s graphite process has 50% fewer steps than electroless copper. From a sustainability viewpoint, it reduces power consumption by 57%, waste treatment by 69%, and water usage by 76%, together with significant reductions in CO2 equivalent emissions and carbon footprint. This direct-metallization product features improved colloid stability, resulting in simplified operations and a footprint half that of an equivalent electroless copper line. It improves hole-wall conductivity and copper plating propagation. Swanson’s test results indicate increased microvia and plated-through-hole reliability in areas such as thermal cycling, simulated reflow testing, and OM thermal stress testing. Following an intense day of technical presentations, delegates took a bus to the Port of Leith Distillery, Scotland's first vertical distillery, a remarkable new nine-story building in Edinburgh's traditional whiskey district, overlooking the historic Royal Yacht Britannia moored dockside. It was a fascinating guided tour of the distillery, concluded with a convivial and sociable conference dinner before the return bus journey to the hotel. The proceedings of the second conference day are reported separately. Once again I am grateful to Alun Morgan for kindly sharing his photographs. Editor's note: This article was previously published in PCB007 and we are grateful for their permission to include this in our Journal. |
The technical program began with a session on sustainability and recycling, moderated by EIPC treasurer Emma Hudson, who introduced Chris Klok of MacDermid Alpha Electronic Solutions in the Netherlands described the CIRC-UITS project, a three-year initiative funded by the European Union with a consortium of 20 partners, designed to enhance sustainability and circularity in the European electronic components industry, particularly within the automotive and mass electronics sectors.
Klok discussed the details of these pilots and reviewed their progress. One partner is assessing the possibility of disassembling and repairing electronic stability program equipment, while another has designed two new tire pressure monitoring systems following eco-design logic. Two partners are assessing the eco-design and repairability of in-mold electronic prototypes, while another two partners are assessing new sorting procedures for automatic obsolete PCB selection. In addition, one partner is supporting all four pilots by designing, implementing, and testing new AI-based PCB disassembly procedures, enabling the reuse of specific semiconductors de-soldered from samples supplied by each pilot leader.
Xiaochuan Fang, research associate at the University of Glasgow, opened his presentation on sustainable, fully recyclable liquid metal PCBs for wireless applications by asking: “Are PCBs sustainable?” He stated that PCB assemblies contain critical raw materials, and their manufacture consumes valuable resources. He indicated that PCB assemblies contain critical raw materials and that valuable resources are consumed in their manufacture. Manufacture of active components results in high carbon emissions. He cited a 90nm integrated circuit, with a CO2 equivalent of 7kg (15.4 lbs), as an example; barely any waste electrical and electronic equipment (WEEE) gets recycled. Furthermore, most existing “green” PCB circuits made of sustainable materials are not suitable for wireless applications, and there are no reports of recycling in such applications.
Kunal Shah’s presentation was titled: “Sustainability and Circularity are Key Parameters for Chemistry Choices for Next-generation Electronic Assemblies.” Shah described LiloTree’s cyanide-free, nickel-free alternative gold finish for PCBs. The chemistry he is promoting produces a 50- nanometer layer of gold on a nano-engineered barrier-layer treatment on the copper surface. The process is cheaper to run than ENIG and provides more reliable results, in addition to its environmental benefits.
Martyn Gaudion, CEO of Polar Instruments, moderated the session, “From Microvias to Medical Implants: Materials and Processes Enabling Tomorrow’s Technologies.” The first presenter was Vasco Duarte da Costa, R&D engineer at Dyconex in Switzerland, with a paper on Advances in Biocompatible Substrate Technology for Neurological Implants.
Why was LCP chosen as the alternative to traditional polyimide film? Da Costa listed the benefits, the main one being that LCP is thermoplastic and can be thermoformed and laminated, or fusion bonded without adhesives. It has low water absorption and permeability, together with superior barrier properties for gases. These attributes make it a suitable biocompatible insulator.
Gustavo Ramos, senior director of global sales and service at Greensource Engineering, explained how to enhance copper plating performance with a novel high-efficiency plating system. Reviewing the benefits and limitations of existing technologies, he shared that vertical plating is the traditional methodology, enabling the batch processing of multiple panel sizes with a large plating window and flexibility for multiple batch types. Soluble anodes are used, and process times are characteristically long. Vertical continuous plating improves uniformity over standard methods, with continuous panel movement through plating baths with insoluble anodes. Various configurations are available, offering touch-free handling of ultra-thin panels and high-density designs.
Roger Massey, technical marketing manager at MKS Atotech, gave us a most interesting lesson in copper metallurgy and crystallography in his update on factors affecting crystallization and epitaxial growth in blind microvias. “What makes a microvia reliable?” he asked. “There is no silver bullet.”
PCBs are manufactured using basic industry-standard processes and subjected to comprehensive testing: thermal, mechanical, electrical, and environmental, which Selver described in detail. The recyclability of substrate materials is subsequently demonstrated by dissolving the PVA in hot water and re-manufacturing useable substrates from the recovered woven fabrics. Life cycle assessment indicates that the recyclable PCB substrate material emits approximately 68.5% less CO2 than FR4.
King sees PEDOT/PSS as a sustainable alternative material, a blend of two distinct polymers: conductive poly(3,4-ethylenedioxythiophene) (PEDOT) and non-conductive polystyrene sulphonate (PSS). It is water-soluble, low-temperature processing, biocompatible, has metal-like conductivity, and is capable of being screen printed in multiple layers to achieve sheet resistance values of less than 5 ohms/square. It has the potential to facilitate the development of large-area fabrication techniques, and King demonstrated a procedure for the assembly of vertically-integrated E-textiles by screen printing PEDOT/PSS onto a non-woven fabric substrate. He also discussed the characteristics of high-frequency components based on sustainable PEDOT/PSS E-textiles, explained how through-hole interconnects are formed in a polyurethane dielectric, and spoke about the challenges in overcoming crosstalk in RF applications.
To complete the first-day conference program, John Swanson of MacDermid Alpha Electronic Solutions spoke about the European implementation of an enhanced direct-metallization process for advanced PCB production. Comparing direct metallization with electroless copper in through-hole plating applications, he listed the macro trends impacting the global electronics OEM, including sustainability and environmental considerations as well as density, performance, and reliability. The objective is to make a quantifiable difference with more eco-friendly products, processes, and supply chains, creating advanced electronics that will do more, last longer, perform better, and in smaller spaces.|
Section 8 Day 2: More Cutting-edge Insights at the EIPC Summer Conference |
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| The European Institute for the PCB Community (EIPC) summer conference took place this year in Edinburgh, Scotland, June 3-4. This is the third of three articles on the conference. The other two cover Day 1’s sessions and the opening keynote speech. Below is a recap of the second day’s sessions.
High-density Integration Delegates re-convened at Edinburgh’s Delta Hotel for the second day’s technical program, which opened with the session, “Enabling High-density Integration: From HDI to Medical and Chiplet Substrates,” moderated by Martyn Gaudion, CEO of Polar Instruments. Gaudion welcomed back Roger Massey, technical marketing manager at MKS Atotech, to comment on the capabilities and challenges in taking the step from HDI to advanced HDI.
He considered the limit of subtractive HDI to be 40/45-micron line and space, whereas SAP was best suited for less than 20/20 micron. Ultra HDI, also referred to as mSAP or amSAP, was the best selection for achieving 30-40 micron line and space, with options to extend to 20-40 microns. The technology is in volume production and processes already exist, although operating costs are higher compared with traditional HDI processes, and there are opportunities to adopt existing infrastructure. In-line horizontal plating is preferred, and requires new process chemistry to maximize blind microvia coverage with minimal surface copper, the objective being to minimize the amount of copper foil to be removed. Enhanced etch capabilities are required for optimal results.
He emphasized that experienced process suppliers are the best partners when moving to Ultra HDI technologies.
Substrates for Chiplet Technologies
With technologies advance to progressively finer pitches, he described features characteristic of mSAP and amSAP. Like HDI, these use copper-clad laminate but with thinner base copper: 1.5–3 microns, and 1–2 microns of electroless copper. Achievable line widths are in the range 50–15 microns. SAP uses ABF film instead of copper-clad laminate, with 1–2 microns of electroless copper. Achievable line widths are in the range 25–8 microns. Similarly, aSAP uses ABF film instead of copper-clad laminate, with a vapor-deposited seed layer of copper or titanium. Achievable line widths are in the range 10–5 microns and below. Böttcher showed schematics of a process flow and a concept panel-level packaging line, and a process overview of an advanced semi-additive (aSAP) RDL process: ABF substrate, dielectric application, via formation, PVD seeding, photo resist application, lithography, electrolytic copper deposition, and differential etch. He showed photographs and discussed three different via-formation techniques, comparing established 30-micron laser vias with 8-micron photo dielectric vias and 14 micron plasma vias, and indicated the relevant areas of research being undertaken, with notes on the impact of formation technique on yield. He further discussed practical aspects of lithography, plating, and resist removal, and the differential etching of copper and titanium seed layers, together with notes on process control, electrical testing, and yield evaluation of RDL structures. Looking to the future, glass core substrates offered an excellent opportunity in terms of outstanding dimensional stability. Initial approaches for this technology are in place. Technologies for Medical Applications
He described the established SAP technology at Dyconex. Although the industry standard is a proven, cost-effective wet process with acceptable adhesion, Dyconex bases its process on sputtering, which is more flexible, gives superior adhesion, and supports alternative metals, even though it is more technically demanding and requires precise process control. Copper is the company’s standard material for fine-line, high-precision SAP structures, but gold is ideal for biocompatible medical applications. Titanium and its alloys are used for precisely controlled resistive structures, and niobium has the potential for superconducting applications. Capeder discussed some of the challenges they overcame in establishing reliable seed layer adhesion. Resist imaging is carried out using high-end LDI in ISO Class 5 clean rooms. Because SAP involves 30% more process steps per layer than subtractive technology, effective process control is critical to maintain process yield, and early defect detection is key. Dyconex uses high-resolution AOI for inspection, with automatic optical shaping (AOS) to remove shorts where necessary, providing the customer approves. Capeder shared examples of high-end IC substrates enabled by SAP technology, featuring up to 20 layers with lines and spaces as small as 10 microns, measurement structures, precision passive components, and devices for ultrasound neuro-stimulation. Thermal Management and Wastewater Treatment
After discussing, in general terms, the thermal management of PCBs at system, board, and component levels, Stewart commented on the widespread use of copper coins in PCBs and explained some of the benefits of using sintered copper paste to manage heat and conduct power. There are no restrictions on feature sizes, shapes, and geometries; sintered paste used in place of copper coins opens up a range of design possibilities.
He described the characteristics of a sintered copper coin and how its physical properties (porosity, thermal conductivity, and coefficient of thermal expansion) are measured. Thermal conductivity is around 120-130 W/mK, although newer versions have conductivities approaching that of pure copper. Sintered copper paste has also been used in power-trench applications, both for conducting electrical power and for thermal management, and Stewart explained how the hardness and porosity of the sintered deposits are evaluated. He concluded that sintered copper provides an alternative to traditional copper coin technology, giving a greater degree of design flexibility in the PCB. It can also deliver power to geometries that are currently either difficult or impossible to achieve with traditional plating processes. The Importance of Water Recycling
His approach to water recycling projects is to separate and group wastewater streams by pollutant concentration, because “to mix creates waste.” The objective is to characterize individual streams and define the best available technology for each stream type. Wastewater can be classified as exhausted process baths containing concentrated chemical solutions, which require special waste handling or targeted recovery, or rinse waters with contaminant concentration levels depending on whether they are “first,” “intermediate,” or “final.” The key treatment technologies are: ion exchange resins, membrane filtration, chemical-physical, evaporation technologies, and zero-liquid-discharge. DI water from final rinses can be recycled through ion exchange resins on a closed loop with a high flow rate. Semi-permeable membranes are ideal for producing high-quality water, but generate a concentrated stream requiring further treatment. Reverse-osmosis membranes can be used downstream of water treatment plants to recover pure water, but generate a reject brine that must be handled with other treatment processes. Chemical-physical treatment can be used in continuous or batch operation for efficient precipitation and separation of dissolved metals, or can eliminate suspended solids by coagulation or flocculation. Vacuum evaporation can be used to treat small volumes of highly polluted wastewater. The distillate is reusable in the manufacturing process, and the concentrate is sent for disposal or the recovery of raw materials. Finally, zero liquid discharge maximizes water recovery and minimizes waste output. It involves advanced evaporation and filtration and is critical for full sustainability in PCB manufacturing. Martini described two case histories. The first is a new PCB project in Europe with a water treatment process designed to recycle more than 50% of water. It has taken an integrated approach involving cooperation between the end user, the chemical suppliers, the machinery suppliers, and the water treatment plant supplier. The second is the evaporation of exhausted bath solutions from a dry film stripping process, which uses a heat pump vacuum evaporator and produces high-quality distillate water and a distillate: concentrate ratio of 20:1. He finished by noting the key design factors for a water recycling solution: deep analysis and an integrated approach to production, chemistry, and water, accurate separation of wastewater streams, based on contaminant concentration and type. Surface Finishing Processes
Alun Morgan closed the conference and thanked the sponsors for their support, Tarja Rapala-Virtanen for curating a first-rate conference program, the moderators for managing the sessions, the speakers for their excellent presentations, and Kirsten Smit-Westenberg and Carol Pelzers for their professional organization and management of the event. May I add my thanks to the EIPC team for making me welcome, and Alun Morgan for sharing his photographs. |
Lars Böttcher, project manager at Fraunhofer IZM in Berlin, continued the theme of high density interconnect with his presentation on substrates for chiplet technologies, discussing an advanced semi-additive process for redistribution layers, bridging the gap between PCBs and wafer-based interposers on his chart depicting the landscape of advanced substrates.
David Capeder, application engineer at Dyconex in Switzerland, presented on semi-additive plating technology for medical applications. He believes that while lines and spaces of 18 microns are the limit of capability for subtractive processes, the semi-additive process (SAP) can achieve lines and spaces as fine as 8 microns.
Stewart explained the mechanism of sintering as a thermal process of converting loose, fine particles into a solid, coherent mass by heat and/or pressure without fully heating the particles to the point of melting. Molecules in the sintered material diffuse across the boundaries of the particles, fusing the particles and creating a densely packed homogeneous structure with no voids or cavities. The actual sintering can be carried out by the PCB fabricator using a laminating press.
Carlo Enrico Martini, marketing manager at SAITA in Italy, explained why water recycling matters and describing recycling solutions in the PCB industry. His opening slide summarized the realities: PCB production is water-intensive and generates wastewater with high pollutant loads; water reuse improves sustainability and operational resilience, and there is increasing regulatory pressure on water discharge. There are clear economic and environmental benefits from closed-loop systems.Section 9
The European PCB-Industry is in Danger
Dieter G. Weiss
European EMS and PCB Consultant
for the Global Electronics Association
Most people reading this will now say: tell me something new. We know it and we have seen it coming for the last 35 years. In the German speaking countries (D-A-CH) a separate association, the Association of Printed Circuit Board Manufacturers (VdL e.V.) was founded in 1988 to represent the interests of the printed circuit board industry and to assert itself against the already significantly lower prices from the Far East. For many years members and association officials talked with politicians, mainly in Germany to convince them of the thread for the independence of European electronics manufacturing. I was active for many years in this association as well and must admit, we did not achieve anything. Politicians we talked to replied that it was advantageous to have global free trade which would guarantee our wealth and help us source products, where we could get them cheapest.
Geopolitics have changed massively, and we cannot just be so naïve to think that countries which we do not consider our allies are just having an economic interest in doing business with Europe.
For those not constantly involved in the European PCB manufacturing industry just a short explanation. The market statistics for the European PCB industry has been done by Michael Gasch for 22 years under the brand Data4PCB until his sudden death in May 2024. I took over the work in March 2024 and am strongly supported by Global Electronics Association. We do monthly B2B statistics for Europe and 44 PCB companies with 51 facilities, representing about 70% of European PCB Manufacturing are reporting their numbers every month, giving the participating companies a professional overview and benchmark of market developments.
In present we are working at the European PCB report. Unfortunately, we still do not have the 2024 global numbers, which are collected from the various global associations, and I must limit myself to Europe, which today accounts for little more than 2% of global PCB manufacturing:
The number of PCB manufacturers and facilities has been constantly diminishing and all efforts so far to stop this process have not been successful. Even of the 194 facilities in Europe at the end of last year, four facilities ceased business in the first half of 2025.
The Top 30 for 2024 are shown below. These 30 companies do nearly 68% of all European PCB manufacturing and probably most of them will still be around 10 years from now.
But the situation totally changes when we look at the small companies. If we now look specifically at companies with less than €5 million in revenue, we were able to perform a detailed analysis of 15 of the 107 companies up to 2023. Of these 15 companies, 40%, or six companies, generated losses in 2019. This number was briefly halved during the coronavirus pandemic and returned to 40% in 2023. If these 15 companies are representative of the entire 107 companies with less than €5 million in revenue, this would mean that approximately 42 companies made losses in 2023. This number is likely to have increased to over 50 companies in 2024 due to the continued decline in revenue.
Further studies also reveal differences in margins. Companies that can deliver prototypes quickly and reliably and perhaps also can assemble them perform better. But there are also entrepreneurs who deliberately bury their heads in the sand and say, "I'm in my late 50s now, I'll stick it out until retirement, and then I'll close the business." These are also the people who ultimately don't care about our industry. To everyone else, I can only say that our fight must be waged much more vigorously and radically to wake up politicians.
We have a rare chance today, which comes with the changes in geopolitical situation. Our Politicians are of the opinion that we must heavily invest in defense, even though people who have not experienced war, but who wage war or provoke it themselves, do not know what terrible things they are doing. We see a massive increase in defense spending, which involves lots of electronics, which can easily account for 25-50% of spending. Unfortunately, our politicians have not realized as of now, that such defense systems are still often enough manufactured using Chinese Electronics and/or Chinese PCBs. The Mossad-effect, that PCBs and electronics can be manipulated, are ignored. Whereas in the USA as well as in Russia there are precise legislations that do not allow PCBs and Electronics from non-allies being used for defense systems, in Europe everybody is sleeping.
Our politicians need a wake-up call. Without clear legislation in Europe that stipulates that printed circuit boards for defense technology must be produced in Europe, there will be no future. The foolish argument that there is no manufacturing capacity for this simply demonstrates a lack of understanding of market economics. If such a law makes it possible to offer adequate prices again, then the industry will ensure that the necessary capacities are available. In addition, most PCB manufacturers are working on a single shift today, the bigger companies on a two-shift operation. Please, do not use the argument now that additional labor is not available to open additional shifts. With adequate prices, PCB manufacturers can pay operators better and for sure will get the required manpower.
If you, as an EMS company, believe that this is none of your business and that you are only responsible for your own profits, then the Chinese competition, which is recruited from Chinese printed circuit board manufacturers, will prove you wrong.
At least in Great Britain we are seeing a change in the PCB business. The market share for Air, Space & Defense (AS&D) has been picking up already in 2024 and in return saw a massive share increase in business for the PCB manufacturers. Unfortunately, this is not reflected in the revenue development in Great Britain so far but while all of Europe saw a decline in revenues of 4.1%, in Great Britain it was only minus 1.1%. AS&D is now at 73% of market share in Great Britain. This must happen all over Europe and it is an opportunity.
If nothing happens, it is crystal clear what the future looks like. In ten years from now, the number of PCB manufacturers will be cut in half and while the global market is growing, Europe’s share of global PCB manufacturing will be down to 1%.
If you are a PCB manufacturer and still have a little fighting spirit you should contact us. We are at several seminars and exhibitions, and we would like to talk with you. Consider as well participating in the monthly B2B statistics. Meet us at the IPC EMS seminar in Paris, France on September 18 or latest at Productronica in Munich.
Section 10
Members News
Exception PCB
We are thrilled to welcome Vin Makwana, our new R&D Manager. With over 40 years of experience, he brings a wealth of knowledge to our team. We look forward to the expertise he’ll share and the impact he’ll have in mentoring the next generation. Great to have you back with us Vin! Read more...
GSPK Circuits
We're proud to announce that GSPK Circuits has been awarded ISO 13485 certification - the internationally recognised standard for quality management systems in the design and manufacture of medical devices.
Steve Lloyd, Managing Director of GSPK Circuits, commented:
"Achieving ISO 13485 is a huge milestone for us, and a clear signal of our long-term commitment to the medical sector. I'm especially proud of the effort from Faye Appleton and her team - this wouldn’t have happened without their dedication, attention to detail, and sheer determination." Read more...
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Section 11 |
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Adeon Technologies has signed an agreement as Distribution and Service partner with PMT Global from Germany for its high precision measurement range of products. We will be representing this exciting new product throughout Europe and the UK. The equipment is dedicated to measure and provide detailed measurement reports of 2D dimensions for the Printed Circuit Board and Chemical Milling industry. The products are highly intelligent as digital drawings can be read and translated automatically into measurement parameters. Read more... |
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5 Things to Ask Your Supplier About Their Environmental Impact But not every supplier can demonstrate what they’re doing to minimise environmental harm, and even fewer have the data to back it up. So, how do you tell the difference between ambition and action? Read more... |
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Introducing ElectraJet® ETJ24 — our latest breakthrough in inkjet etch resist technology. Designed for digital precision, ETJ24 delivers clean, consistent, high-resolution imaging with outstanding resistance through the etching process. Whether you're running prototypes or scaling to volume, ETJ24 is engineered for reliability and performance across a wide range of production environments. ElectraJet ETJ24 — Leading the way in inkjet etch technology. |
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In December, we made a strategic — and admittedly difficult — decision to close our Poole manufacturing facility. This move was not taken lightly, but it marked a pivotal shift in our commitment to progressing our capabilities and enabling focus on our investment and technology advancements. Our main facility in Exmouth has continually worked in parallel with the Poole site and has the manufacturing background, knowledge, and experience to be well established and positioned to continue complex production. With an experienced team in place and proven processes, we have been able to scale up our production of flex and flex-rigid PCBs, focused in one facility. To support this growth, we have increased our technical department and invested in training and continuous improvement in all areas. We have made investments in further equipment such as additional LDI and laser rout capacity. Of course we continue to invest in our manufacturing facility, particularly targeted at flex and flex-rigid manufacture, for high-reliability and complex PCB markets. Read more... |
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Today (4th Aug 2025) I announced our latest acquisition Exception PCB Ltd, a business I know very well and am so excited to be back working with. Bringing the business back from Chinese into UK ownership as part of the Connexion Technologies Group hugely strengthens our advanced electronic manufacturing capability for world leading OEMs. Craig Wright |
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Graphic introduces the first stages of its ‘Centre of Excellence’ Here at Graphic, we are making personal development a cornerstone of our company’s growth and innovation. We're proud to share a number of exciting initiatives that reflect our commitment to our people. Firstly, we're actively building our next generation of talent by integrating T-Level learners into our workplace. Read more... |
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We're proud to announce that GSPK Circuits has been awarded ISO 13485 certification - the internationally recognised standard for quality management systems in the design and manufacture of medical devices. While GSPK already supports a number of customers in the medical sector, this accreditation marks a significant step forward in our commitment to the industry. It reflects our ongoing investment in quality systems, skilled people, and the advanced manufacturing capabilities needed to support medical applications. Read more... |
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ALR Services Ltd. and Kingfisher PCBs Ltd., who joined ICAPE Group earlier this year, have officially merged to become ICAPE UK as of July 1st, 2025! Led by Justin Olejnik, this merger unites two trusted UK providers under one strong brand—enhancing our capabilities, streamlining service, and strengthening local support backed by ICAPE Group’s global network. We’re excited to continue delivering top-tier PCB and technical parts solutions to our UK clients—now as one united team. Read more... |
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Jiva have launched a newsletter, "Jiva Jabber" to keep everyone updated on their fast pace of growth. In that latest issue there was a nicely crafted article about the ICT for which we are very grateful. Read more.. Invest in the Future of Sustainable Electronics We’re thrilled to offer a limited investment window to private investors, angels, and early-stage funds. But act fast: we’re only open for a few more months. After this round closes, future funding will be reserved for strategic corporate partners only. Why Now? |
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Merlin Circuit Technology are proud to announce that it has passed our latest NADCAP audit (2nd year Merit status) This achievement would not have been possible without Merlin’s dedicated team and demonstrates our ongoing commitment to quality within the Aerospace and Defence sectors. Read more... |
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UCE Shadow Plus Line
From left to right are Philip King, Dan Haines (Viking), Paul Lindsay (Macdermid),and Lindsey Mercurio (Macdermid USA). Read more... |
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Schmoll Laser Drilling: Precision Through Multiple Layers |
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Ventec strengthens commitment to Halogen-Free PCB manufacturing in Europe. Significant investment in stockholding at Kircheimbolanden, Germany, headquarters assures supply and has established volume inventory of halogen-free FR4.1 and FR15.1 PCB materials at its European hub in Germany. Ventec’s FR4.1 and FR15.1 materials, VT-441 / VT-441V and VT-447 / VT-447V, provide outstanding thermal reliability, with low Z-axis coefficient or thermal expansion (CTE) and glass transition temperature (Tg) covering the mid-to-high range from 150°C to 190°C. |
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We keep investing in new technologies to reach the highest standards of manufacturing. That’s why we purchased a new MDI (Maskless Direct Imaging) from Schmoll Maschinen GmbH. “Our new MDI will not only increase the quality of our products, by providing greater solder mask alignment accuracy over conventional way using photo imageable plots, but also minimise the time spent on reprocessing poorly aligned solder mask.” said Karan Khanuja, Process Engineer at ZOT. Take a look at what our dedication to excellence means for you! Read more... |
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| Section 12 |
Membership News |
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Emma Hudson |
New Associate Members
New Fellow
New Website Sponsors
New Corporate Members
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| Section 13 | Corporate Members of the ICT | |
| Adeon Technologies BV |  |
www.adeon.nl |
| A-Gas Electronic Materials |  |
www.agasem.com |
| Amphenol Invotec Ltd |  |
amphenol-invotec.com |
| Amphenol Trackwise Designs Ltd |  |
www.trackwise.co.uk |
| Atotech UK Ltd. |  |
www.atotech.com |
| CC Electronics |  |
www.ccee.co.uk |
| CCI Eurolam |  |
www.ccieurolam.com |
| Electra Polymers Ltd |  |
www.electrapolymers.com |
| Eurotech Group |  |
www.eurotech-group |
| Exception PCB Solutions |  |
www.exceptionpcb.com |
| Garner Osborne |  |
www.garnerosborne.co.uk |
| Graphic plc |  |
www.graphic.plc.uk |
| GSPK (TCL Group) |  |
www.gspkcircuits.ltd.uk |
| Holders Technology UK |  |
www.holderstechnology.com |
| Icape Group |  |
www.icape-group.com |
| Jiva Materials |  |
www.jivamaterials.com |
| Macdermid Alpha |  |
www.macdermidalpha.com |
| Merlin Circuit Technology Ltd |  |
www.merlinpcbgroup.com |
| Merlin Flex Ltd | |
www.merlinflex.com |
| Minnitron Ltd |  |
www.minnitron.co.uk |
| Newbury Electronics Ltd |  |
www.newburyelectronics.co.uk |
| Pillarhouse Int |  |
www.pillarhouse.co.uk |
| Polar Instruments |  |
www.polarinstruments.com |
| Schmoll Maschinen |  |
www.schmoll-maschinen.de |
| Strip Tinning Ltd |  |
www.striptinning.com |
| Sun Chemical Corp |  |
www.sunchemical.com |
| Teledyne Labtech |  |
www.teledynelabtech.com |
| Ventec Europe |  |
www.ventec-europe.com |
| Zot Engineering Ltd |  |
www.zot.co.uk |
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Section 14 |
ICT Council Members |
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Council Members |
Mat Beadel (Chair), Emma Hudson (Technical Director, Hon Sec, Membership & Events), Chris Wall (Treasurer), Leigh Allinson (Vice-Chair),Richard Wood-Roe (Journal Editor & Web Site), Neil Chamberlain, Steve Driver, Andy Cobley, Jim Francey, Brian Morgan, Pete Starkey, Francesca Stern. |
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Section 15 |
Editor's NotesThe ICT Journal |
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Richard Wood-Roe |
Instructions / Hints for Contributors We really look forward to any input you have. Technical papers, company news, personal news, industry comments or observations. 1. As it is a digital format the length is not an issue. Short is better than none at all! 2. Article can be a paper or a text version of a seminar or company presentation. Please include data tables, graphs, or powerpoint slides. We can shrink them down to about quarter of a page. 3. Photo's are welcome. 4. Style we don't want out and out advertising but we do recognise that the author has a specialism in the product or process that will include some trade promotion. Sometimes it will be a unique process or equipment so trade specific must be allowed. 5. We can accept virtually any format. Word, Powerpoint, publisher, PDF or Open Office equivalents. 6. A photo of author or collaborators. I really do look forward to receiving articles for publication. Richard Wood-Roe |
